dt09 lv Improved Core Isolation and Access for Hierarchical Embedded Test

So 1500 is essentially giving each core a standard interface.

"We selected a star configuration, as opposed to a daisy-chain one, for various reasons, from both a design and test perspective. In a star configuration, each core can be exercised and verified independently from other cores in the context of the entire circuit without having to modify the testbenches or vectors."
(So for daisy chain, our software needs to modify corresponding test benches)

8/20/10 Fri
Each core’s WSP is at the second level of the hierarchy, which is implemented according to IEEE Std 1500.

The serial input is shared by all test ports, but each test port has a dedicated enable (enTP1 to enTP5) and serial output (fromTP1 to fromTP5).

The extTM control signal makes the WBR accessible either as a single or multiple segments, at the core boundary so that it becomes part of the scan test of the next level up.
(Comments: "accessible" here is the keyword. By making these WBR accessible to the upper level, the core can be considered as a blackbox in a upper level scan test.)

Shared isolation is an improvement to IEEE Std1500 that can minimize the amount of test-dedicated circuitry required for core isolation and enable atspeed testing within and between cores