1149.7 std

(page ii)
Abstract: This specification describes circuitry that may be added to an integrated circuit to provide access to on-chip Test Access Ports (TAPs) specified by IEEE Std 1149.1TM-2001.

(page 6)
introduction

This standard defines a debug and Test Access Port that provides both compatibility with IEEE Std
1149.1TM-2001a and operation with as few as two pins.

The process of developing this standard began in 2004 when the Mobile Industry Processor Interface (MIPI) Alliance Test and Debug Working Group was formed. During 2004, a standard that addressed the needs of both test and debug was described and requirements were gathered.

Once the requirements gathering process was completed in 2004, the Test and Debug Working Group turned its attention to proposals for addressing the above requirements

(page 53)
1. Overview
1.1 Scope
The standard will define a link between IEEE 1149.1 interfaces in Debug and Test Systems (DTS) and IEEE 1149.1 (JTAG) interfaces in Target Systems (TS).

1.2 Purpose
1.3 Contrasting IEEE Std 1149.1-2001 and this standard
(page 54)
IEEE Std 1149.1-2001 was introduced to address issues related to the manufacturing test of boards and systems.

This standard is complementary to IEEE Std 1149.1-2001 and does not seek to replace it.

This standard differs from IEEE Std 1149.1-2001 as it intentionally blurs the boundary between boards, packages, and chips.