Friday, August 20, 2010

1500 std

Introduction

(page 5)
IEEE Std 1500 is a scalable standard architecture for enabling test reuse and integration for embedded cores and associated circuitry.

Core test language (CTL) is the official mechanism for describing IEEE 1500 wrappers and test data associated with cores.

IEEE Std 1500 was broadly influenced by the past work of the IEEE Std 1149.1™ Working Group and has several members from that group.

Objective of the IEEE 1500 effort

The Embedded Core Test Working Group was approved in 1997 with the charter to develop a standard test method for integrated circuits (ICs) containing embedded cores, i.e., reusable megacells

(page 11)
1. Overview
IEEE Std 1500™ defines a scalable architecture for independent, modular test development and test application for embedded design blocks and also enables test of the external logic surrounding these cores

The IEEE 1500 architecture comprises hardware requirements, through the definition of a standardized core wrapper, and uses a test-specific language to communicate information between core providers and core users.

IEEE Std 1500 specifically focuses on defining test requirements for unidirectional non-tristate digital terminals, as these represent a minimum and mandatory set of requirements upon which the more complex bidirectional terminals are based.

(page 12)

1.1 Scope
1.2 Purpose
2. Normative references

(page 13)
3. Definitions, acronyms, and abbreviations
This clause lists some definitions of terms that have been used throughout this standard.

3.1 Definitions

3.1.1 access mechanisms: Mechanisms by which signals may be propagated to and from a core, from either embedded circuitry or from the primary inputs and outputs of the system chip.







3. Definitions, acronyms, and abbreviations
3.1 Definitions
4. Structure of this standard
5. Introduction and motivations of two compliance levels
6. Overview of the IEEE 1500 scalable hardware architecture
6.3 Wrapper instruction register (WIR)
7. WIR instructions
7.1 Introduction
Instructions loaded into the WIR, together with the IEEE 1500 wrapper signals, determine the mode of operation of the wrapper and possibly the core itself.

7.2 Response of the wrapper circuitry to instructions
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8. Wrapper serial port (WSP)
IEEE Std 1500 defines mandatory WSP terminals to control serial access to the WIR, the WBY, and the WBR.

WRSTN: When asserted, WRSTN puts the wrapper into its normal system mode. The signal may be used to reset other WRs or wrapper circuitry as needed.

CaptureWR, ShiftWR, UpdateWR: These terminals control and enable WR operations. When one of these signals is asserted to logic 1 and the other two signals are deasserted to logic 0, a corresponding Capture, Shift, or Update operation will be enabled for the selected WR. While the WIR or WBY is selected, the enabled operation occurs synchronously to WRCK.

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